About the role
About FuriosaAI
FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea and Silicon Valley, along with a compiler-focused R&D lab in Lisbon.
Our vision is to make AI computing sustainable, enabling access to powerful AI for everyone on Earth. We solve the AI hardware energy and operational cost crisis at the architectural level, rather than through brute force, building the world's first truly AI-native compute platform to unlock the full potential of artificial intelligence for every enterprise.
Key Responsibilities
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Define, plan, and implement block and system level verification strategies
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Write and review test plans, develop test harnesses and test sequences
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Drive the design verification process to successful closure by meeting defined verification metrics across the test plan, functional coverage, and code coverage
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Collaborate closely with the Design team to debug, root-cause, and resolve functional failures within the design
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Work collaboratively with cross-functional teams, including Design, Model, Emulation, and Silicon Validation, to ensure the highest standards of design quality
Minimum Qualifications
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Bachelor's degree in Electrical Engineering, Computer Science, or a closely related technical field
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5+ years of experience in block and system level verification utilizing SystemVerilog/UVM-based methodologies
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Proven experience with Electronic Design Automation (EDA) tools and proficiency in scripting languages (Python, Perl, Shell) for developing verification tools and flows
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Experience in architecting and deploying Design Verification infrastructure, including executing the complete verification cycle from planning to closure
Preferred Qualifications
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Master’s degree in Electrical Engineering, Computer Science, or a closely related technical field
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Expertise in developing UVM-based verification environments from initial setup
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Expertise in developing Python-based verification environment such as cocotb
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Experience in IP or integration verification for high-speed interfaces such as PCIe, UCIe, UALink, and Ethernet
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Experience verifying ARM/RISC-V-based sub-systems or SoCs
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Strong Python programming skills
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Excellent written and verbal communication skills
Why Join FuriosaAI
The defining bottleneck of the AI era is building the right hardware and software stack to run it at global scale. Furiosa is solving this challenge holistically from the ground up.
With our flagship chip, RNGD, in mass production today and our next-generation platform in development with Broadcom, we are proving that full-stack, tensor-native compute is the future of AI infrastructure. This is a pivotal moment to join our team, right as we accelerate our global expansion.
At Furiosa, you will:
Solve AI’s Most Urgent Challenge. Help build the high-performance, energy-efficient inference hardware and software required to fulfill the promise of advanced AI.
Pioneer Full-Stack Co-Design. Work with teams that are architecting solutions from silicon up through the compiler (featuring innovations like Tensor Contraction Language and Virtual ISA) and serving frameworks.
Ship Real-World Silicon, Software, and Solutions. Turn breakthrough technology into commercial deployment. RNGD is in mass production with TSMC and running live enterprise workloads for global leaders like LG AI Research and Samsung SDS.
Partner With the Industry's Best. Collaborate across an elite global ecosystem that includes TSMC, Broadcom, SK Hynix, and GUC.
Do Your Life’s Best Work. Join a brilliant, low-ego, mission-driven team in a high-trust environment that values autonomy, intellectual curiosity, and shared ambition.
Contact
• talent@furiosa.ai